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A Low-Power 60-GHz Integrated Sixport Receiver Front-End in a 130-nm BiCMOS Technology

Title data

Völkel, Matthias ; Dietz, Marco ; Weigel, Robert ; Hagelauer, Amelie ; Kissinger, Dietmar:
A Low-Power 60-GHz Integrated Sixport Receiver Front-End in a 130-nm BiCMOS Technology.
In: 12th European Microwave Integrated Circuits Conference : EuMIC 2017. - Nürnberg, Germany , 2017 . - pp. 73-76
ISBN 9782874870484
DOI: https://doi.org/10.23919/EuMIC.2017.8230663

Abstract in another language

In this paper a 60 GHz monolithic low-power sixport receiver front-end for high precision industrial radar systems is presented. The measurement principle is based on the passive superposition and power detection of two incident millimeter-wave signals. The integrated receiver has been designed using a 0.13 μm SiGe BiCMOS process from IHP (SG13G2) and includes a low noise amplifier (LNA), the passive sixport structure and four detectors. The signal processing in the baseband is done with an ADC-board designed with components from Texas Instruments and a Cyclone IV FPGA board. The integrated receiver circuit has a size of 1320 pm × 950 pm and a low power consumption of 73 mW from a 3.3 V power supply.

Further data

Item Type: Article in a book
Refereed: Yes
Keywords: industrial radar; interferometer; phase measurement; sixport; low power; SiGe BiCMOS
Institutions of the University: Faculties > Faculty of Engineering Science > >
Result of work at the UBT: No
DDC Subjects: 600 Technology, medicine, applied sciences > 620 Engineering
Date Deposited: 18 Oct 2019 07:19
Last Modified: 18 Oct 2019 07:19
URI: https://eref.uni-bayreuth.de/id/eprint/52525