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A 1.8-mW Low Power, PVT-Resilient, High Linearity, modified Gilbert-Cell Down-Conversion Mixer in 28-nm CMOS

Title data

Ciocoveanu, Radu ; Rimmelspacher, Johannes ; Weigel, Robert ; Hagelauer, Amelie ; Issakov, Vadim:
A 1.8-mW Low Power, PVT-Resilient, High Linearity, modified Gilbert-Cell Down-Conversion Mixer in 28-nm CMOS.
In: Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems : Proceedings. - Anaheim, USA , 2018 . - pp. 19-22
ISBN 978-1-5386-1298-9
DOI: https://doi.org/10.1109/SIRF.2018.8304218

Abstract in another language

This paper presents a high linearity modified Gilbert-cell mixer designed for 60-GHz applications and fabricated in a 28-nm CMOS technology. To increase the linearity of the mixer, the RF transconductance stage was removed, thereby reducing the amount of stacked transistors. We propose using a self-biasing V th reference in the bias network to make the mixer more robust to process-voltage-temperature (PVT) variations. Measurement results show that this mixer achieves a voltage conversion gain of 4.7 dB, a 1-dB compression point of -3 dBm and a 12.3 dB noise figure, while it draws only 2 mA from a single 0.9 V supply. The occupied area on the chip is 0.35×0.68 mm 2 including pads.

Further data

Item Type: Article in a book
Refereed: Yes
Keywords: Down-Conversion Mixer; High-Linearity; Low-Power; PVT Robust
Institutions of the University: Faculties > Faculty of Engineering Science > >
Result of work at the UBT: No
DDC Subjects: 600 Technology, medicine, applied sciences > 620 Engineering
Date Deposited: 18 Oct 2019 07:28
Last Modified: 18 Oct 2019 07:28
URI: https://eref.uni-bayreuth.de/id/eprint/52551