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Bias-switched Down-Conversion Mixer for Flicker Noise Reduction in 28-nm CMOS

Title data

Ciocoveanu, Radu ; Weigel, Robert ; Hagelauer, Amelie ; Issakov, Vadim:
Bias-switched Down-Conversion Mixer for Flicker Noise Reduction in 28-nm CMOS.
In: Texas Symposium on Wireless and Microwave Circuits and Systems : Proceedings. - Waco, Texas , 2018
ISBN 978-1-5386-4918-3
DOI: https://doi.org/10.1109/WMCaS.2018.8400634

Abstract in another language

This paper presents a modified Gilbert-cell mixer employing a novel biasing-scheme used to reduce the high Noise Figure, due to inherently high 1/f noise of MOS transistors. Switching the transistor from strong inversion to accumulation interferes with the self-correlation of the physical noisy process, which leads to a reduction in flicker noise. To illustrate this improvement, a comparison with a conventionally biased mixer is carried. Post-layout simulation results show that this mixer achieves a voltage conversion gain of 2.2 dB, a 1 dB compression point of 3 dBm and a 5 dB reduction in noise figure at 50 kHz, while it draws a current of 13 mA from a single 0.9 V supply. The occupied chip area is 0.5x0.94 mm². According to author’s knowledge this is the first time that bias switching technique is applied to a mixer at mm-wave frequencies.

Further data

Item Type: Article in a book
Refereed: Yes
Institutions of the University: Faculties > Faculty of Engineering Science > >
Result of work at the UBT: No
DDC Subjects: 600 Technology, medicine, applied sciences > 620 Engineering
Date Deposited: 18 Oct 2019 09:32
Last Modified: 18 Oct 2019 09:32
URI: https://eref.uni-bayreuth.de/id/eprint/52556