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Integrated galvanically isolated MOSFET and IGBT gate-driver circuit with switching speed control

Titelangaben

Lorentz, Vincent ; Schwarz, R. ; Heckel, T. ; März, Martin ; Frey, L.:
Integrated galvanically isolated MOSFET and IGBT gate-driver circuit with switching speed control.
2015
Veranstaltung: IECON 2015 - 41st Annual Conference of the IEEE Industrial Electronics Society , Nov. 9–12, 2015 , Yokohama, Japan.
(Veranstaltungsbeitrag: Kongress/Konferenz/Symposium/Tagung , Vortrag mit Paper )
DOI: https://doi.org/10.1109/IECON.2015.7392158

Volltext

Link zum Volltext (externe URL): Volltext

Angaben zu Projekten

Projekttitel:
Offizieller Projekttitel
Projekt-ID
KAIROS: Keramische Aufbau- und Integrationstechnik für robuste Signal- und Leistungselektronik
16N11662

Projektfinanzierung: The research leading to these results was conducted under a cooperation between the Fraunhofer IISB and the Chair of Electron Devices at the University of Erlangen-Nuremberg and has received funding from the Federal Ministry of Education and Research of Germany under grant agreement n°16N11662 (“KAIROS”). The authors thank M.T. Niedermeier for his support and V.O. Sedlácek for his engagement during the runtime of this project.

Abstract

This paper presents a galvanically isolated gate-driver integrated circuit realized as an ASIC chipset providing a flexible control of the switching speed of the driven power switches (i.e., IGBT or MOSFET). The driver chipset provides signal and power transmission over a galvanic isolation, thus being able to drive low-side and high-side power switches in power converters. It provides independent control of turn-on and turn-off switching speed by modulating the gate turn-on and turn-off voltage slopes using burst pulses in the MHz range. This function is combined with regenerative switching, thus reducing the energy losses in the gate-driver circuit of the power switch by more than 50%. The gate-driver ASIC chipset was manufactured in a high-temperature automotive grade 0.35μm mixed-signal CMOS technology, thus allowing switching speeds in the MHz range at voltage amplitudes as high as 18V. The paper shows the novel proposed driving concept with its implemented topology and simulation results. Experimental results validate the proposed gate-driver concept based on the manufactured ASIC chipset combined with a typical IGBT as power switch.

Weitere Angaben

Publikationsform: Veranstaltungsbeitrag (Vortrag mit Paper)
Begutachteter Beitrag: Ja
Keywords: ASIC; CMOS; IGBT; MOSFET; Gate-Driver Circuit; Power Converter; Switching Speed Control
Institutionen der Universität: Forschungseinrichtungen > Forschungszentren > Bayerisches Zentrum für Batterietechnik - BayBatt
Forschungseinrichtungen
Forschungseinrichtungen > Forschungszentren
Titel an der UBT entstanden: Nein
Themengebiete aus DDC: 600 Technik, Medizin, angewandte Wissenschaften > 620 Ingenieurwissenschaften
Eingestellt am: 03 Jun 2022 10:56
Letzte Änderung: 12 Okt 2022 13:38
URI: https://eref.uni-bayreuth.de/id/eprint/69870