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Reduction of thermal stress by means of a non-linear thermal capacitance close to the chip

Title data

Gleißner, Michael ; Naumann, Moritz:
Reduction of thermal stress by means of a non-linear thermal capacitance close to the chip.
2025
Event: ECCE Europe 2025 , 31.08.25-04.09.25 , Birmingham.
(Conference item: Conference , Paper )

Abstract in another language

A simple liquid-filled container above the power semiconductor chip increases the thermal capacitance in a certain time range at higher power levels, thereby minimizing the thermal impedance by about 25%. Measurements on a hardware prototype with a periodic load profile at different time constants show that the temperature swing can be reduced, significantly improving lifetime. A simple, one-dimensional network model is presented to reproduce this non-linear, temperature-dependent behavior of the thermal impedance for simulations.
Index Terms—two-phase cooling, thermal behavior, thermal cycling, thermal model, thermal design.

Further data

Item Type: Conference item (Paper)
Refereed: Yes
Institutions of the University: Faculties > Faculty of Engineering Science > Chair Mechatronics > Chair Mechatronics - Univ.-Prof. Dr.-Ing. Mark-M. Bakran
Profile Fields > Advanced Fields > Advanced Materials
Profile Fields > Emerging Fields > Energy Research and Energy Technology
Research Institutions > Research Units > Zentrum für Energietechnik - ZET
Result of work at the UBT: Yes
DDC Subjects: 600 Technology, medicine, applied sciences > 620 Engineering
Date Deposited: 01 Dec 2025 14:37
Last Modified: 01 Dec 2025 14:37
URI: https://eref.uni-bayreuth.de/id/eprint/95359